Reimagining LLM Inference Infrastructure with Memory-Centric KV Cache Servers
HotInfra 2026 (co-located with ISCA 2026), 2026
Publications
You can also find my articles on my Google Scholar profile.
HARMONI: Hierarchical ARchitecture MOdeling for LLMs with Near/In Memory Computing
ISPASS 2026, 2026
A hierarchical architecture modeling framework for evaluating near-memory and in-memory computing solutions for large language model inference.
Sangam: A Chiplet-Based DRAM-PIM Accelerator with CXL Integration for LLM Inferencing
arXiv, 2025
A chiplet-based DRAM processing-in-memory accelerator with CXL integration designed for efficient LLM inference.
TriPIM — Exact Triangle Counting on UPMEM PIM for Graph Analytics
MemSys 2025, 2025
An exact triangle counting implementation on the UPMEM PIM architecture for graph analytics workloads. (Late Breaking Results)
Membrane: Accelerating Database Analytics with DRAM-Based PIM Filtering and Schema Denormalization
ACM TACO 2025, 2025
A system that accelerates database analytics by combining DRAM-based PIM filtering with schema denormalization.
Architectural Modeling and Benchmarking for Digital DRAM PIM
IISWC 2024, 2024
A framework for architectural modeling and benchmarking of digital DRAM processing-in-memory architectures.
An Efficient Scaling-Free Folded Hyperbolic CORDIC Design Using a Novel Low-Complexity Power-of-2 Taylor Series Approximation
IEEE TVLSI, 2023
A scaling-free hyperbolic CORDIC design using a novel low-complexity power-of-2 Taylor series approximation, cutting latency, area, and power versus prior designs, with silicon validation in TSMC 180nm.
Real-time minimum energy point tracking using a predetermined optimal voltage setting strategy
ISVLSI, 2020
A real-time minimum energy point (MEP) tracking method based on a predetermined, per-chip linear MEP-curve model, avoiding costly runtime power measurement.